The QOM function generates complex pulse trains without CPU intervention using a sequence of output
matches. An output match causes a programmable pin response when a user-defined value is matched
by the value of a free-running counter. QOM generates multiple output matches using a queue of offset
times and pin responses in parameter RAM. Queue size can vary from application to application. Vari-ous
modes of queued operation are supported.
2 Detailed Description
The reference time from which the first match in a sequence is scheduled can be the immediate value
Pin response (high or low transition) when a match occurs is fully programmable. Pin response is de-termined
The function can operate in single-shot mode, in which a sequence of match outputs is generated once;
In single-shot mode and in loop mode, the event time of the last match in the queue is written back into
If adjacent queue offset values are programmed for the same pin response, duration of an output event
A detailed description of the QOM algorithm, including a state diagram, is provided for reference at the
3 Function Code Size
41 m instructions + 8 entries = 49 long words
4 Function Parameters
4.1 BIT_A
4.2 LAST_OFF_ADDR
4.3 BIT_B
An immediate TCR value
4.4 REF_ADDR
4.5 OFF_PTR
4.6 BIT_C
An immediate TCR value
4.7 LOOP_CNT
4.8 LAST_MATCH_TIM
6 Function Configuration
1. The appropriate channel priority bits are cleared, disabling the channel.
After initialization, the TPU makes an interrupt service request. If the appropriate TPU interrupt enable
To reinitialize the QOM function after completion of a sequence of matches, the CPU must first refill the
7 Performance and Use of Function
Entries in the QOM queue are incremental match offsets, not absolute match times. The next match
time in a sequence is calculated by adding the next queued offset to the time of the last match. If the
match is the first match in a sequence, the first offset value in the queue is added to a selectable refer-ence
time.
of the selected TCR, the time of the last match of a previous sequence, or a time contained in parameter
RAM. Using the time of the last match of a previous sequence as a reference allows a series of se-quences
to be chained together. Using a time value from parameter RAM allows a chain of output
matches to be referenced to a time derived by another TPU channel.
by the value of bit 0 in each queue entry.
in loop mode, in which a sequence of match outputs is generated a specified number of times (1 to 256),
or in continuous mode; in which the entire sequence repeats until the channel is disabled or the TPU
receives a new host service request. Linked operation allows the function to be triggered by a link from
another TPU channel. All loop modes can be used in conjunction with linked operation.
parameter RAM for the CPU to access. Three host service states allow the function to be initiated with
the output pin high, low, or with no change in state.
can effectively be extended beyond the normal $8000 TCR-count limit imposed by the TPU greater-than-
or-equal-to comparator.
end of this document.
Total TPU function code size determines what combination of functions can fit into a given ROM or em-ulation
memory microcode space. QOM function code size is:
This section provides detailed descriptions of function parameters stored in channel parameter RAM.
Figure 1
shows TPU parameter RAM address mapping. Figure 2
shows the parameter RAM assignment used by the function.
In the diagrams, Y = M111, where M is the value of the module mapping bit
(MM) in the system integration module configuration register (Y = $7 or $F).
Figure 1 TPU Channel Parameter RAM CPU Address Map
Figure 2 QOM Function Parameter RAM Assignment
This control bit determines which of the two TPU timer counters is used as a timebase for an output
match sequence. The timer counter is selected during the host service request states and the link state
(states 1, 2, 3, 4). When BIT_A is equal to zero, TCR1 is selected as the timebase. When BIT_A is equal
to one, TCR2 is selected.
This parameter contains the upper seven bits of the PRAM address of the last entry in the match offset
queue (for example, a value of% 0001101 indicates parameter 5 of channel 1 is the last queue entry). It
is used during the match state (state 5) to determine when the end of the queue has been reached.
This control bit and BIT_C are used during the host service and link states (states 1, 2, 3, 4) to determine
the reference time for the first match after initialization. Reference time can be:
A value in parameter RAM pointed to by REF_ADDR
The event time of the last match in the previous sequence of matches.
When the values of BIT_B and BIT_C select a value in parameter RAM as a reference time for the first
match after initialization, this parameter contains the upper seven bits of the PRAM address of the value
to be used. When an immediate TCR reference or last event reference is selected, it is unnecessary to
provide a REF_ADDR value.
This 7-bit parameter is normally used as a queue pointer. It is updated by the TPU after each match
occurs. OFF_PTR value also determines whether linked operation is selected. If OFF_PTR contains a
non-zero value during a host service state, linked operation is selected. In single-shot mode or loop
mode, OFF_PTR is overwritten by LAST_MATCH_TIM at the end of the match sequence.
This control bit and BIT_B are used during the host service and link states (states 1, 2, 3, 4) to determine
the reference time for the first match after initialization. Reference time can be:
A value in parameter RAM pointed to by REF_ADDR
The event time of the last match in the previous sequence of matches.
This parameter is used as a counter during loop mode operation. The value in LOOP_CNT determines
how many times the queued match sequence is repeated. LOOP_CNT is initialized by the CPU and
decremented toward zero by the TPU. When LOOP_CNT reaches $00 after decrementing, the function
stops and LOOP_CNT is overwritten by LAST_MATCH_TIM. If LOOP_CNT is initialized to $00, the
function loops 256 times.
This parameter stores the time of the last match event in a sequence. The TPU stores the value after
completion of a match sequence during single-shot mode or loop mode operation. OFF_PTR,
LOOP_CNT and BIT_C are overwritten by the LAST_MATCH_TIM value. LAST_MATCH_TIM is writ-ten
after the last match has occurred but before the TPU requests interrupt service from the CPU.
The CPU configures the QOM function as follows.
2. The QOM function number is written to the channel function select bits.
3. BIT_A, BIT_B, BIT_C, LAST_OFF_ADDR, REF_ADDR (if required), OFF_PTR, LOOP_CNT
and queue values OFFSET_1 through OFFSET_N are written to channel parameter RAM.
4. The host sequence bits are written, selecting the desired mode of operation.
5. An HSR is issued to initialize the function and set the channel pin to the desired initial output
state.
6. The channel priority bits are written to enable the function and assign channel priority.
7. The TPU executes the selected initialization state.
bit is set, the CPU recognizes and services the request. In single shot and loop modes, another interrupt
service request is made after completion of the match sequence.
match table with new values, then reinitialize LOOP_CNT, OFF_PTR and BIT_C. LAST_OFF_ADDR
must be changed if the new queue is a different size from the last. Finally the CPU must issue the ap-propriate
HSR.
7.1 Performance
Like all TPU functions, QOM function performance in an application is to some extent dependent upon
the service time (latency) of other active TPU channels. This is due to the operational nature of the
scheduler. When a single QOM channel is in use and no other TPU channels are active, the minimum
time between successive matches is 36 CPU clock cycles in single shot and continuous modes and 44
CPU clocks in loop mode. When more TPU channels are active, performance decreases. However,
worst-case latency in any TPU application can be closely estimated. To analyze the performance of an
application that appears to approach the limits of the TPU, use the guidelines given in the TPU refer-ence
manual and the information in the QOM state timing table below.
