(**********************************************************************) (* *) (* Function: ITC Input Transition Counter *) (* *) (* Creation Date: Pre 89 From: NEW *) (* *) (* Author: Mot Israel *) (* *) (* Description: *) (* ------------ *) (* Count a specified number of transitions then interrupt CPU and *) (* optionally link to a block of channels. *) (* *) (* hsq1 hsq0 *) (* ---------- *) (* 0 0 - no link, single *) (* 0 1 - no link, continous *) (* 1 0 - link, single *) (* 1 1 - link, continous *) (* BANK SIGNAL IS UPDATED ALLWAYS !! *) (* *) (* Updates: By: Modification: *) (* -------- --- ------------- *) (* 16/04/91 ?? added label for End_Transition *) (* 27/Feb/92 JW Cleaned up for inclusion in Library *) (* 07/Apr/93 JL Converted to new syntax & changed unused link *) (* entries to go to End_of_Link *) (* *) (*--------------------------------------------------------------------*) (* Standard Exits Used:- End_Of_Phase: Y End_Of_Link: N *) (* *) (* External Files included: LINKCHAN. *) (* *) (* CODE SIZE excluding standard exits = 36 LONG WORDS *) (*--------------------------------------------------------------------*) (* *) (* *) (********** This Revision: 2.0 *********) (* *) (* Functionally identical to 68332 TPU ROM of masks D33F, D87M, 2D87M *) (* *) (********** LAST MODIFIED: 06/Apr/93 BY: Jeff Loeliger ********) (* *) (**********************************************************************) (***************************************************************************) (*Motorola reserves the right to make changes without further notice to any*) (*product herein. Motorola makes no warranty, representation or guarantee *) (*regarding the suitability of its products for any particular purpose, nor*) (*does Motorola assume any liability arising out of the application or use *) (*of any product or circuit, and specifically disclaims any and all *) (*liability, including without limitation consequential or incidental *) (*damages. "Typical" parameters can and do vary in different applications. *) (*All operating parameters, including "Typical",must be validated for each *) (*customer application by customer's technical experts. Motorola does not *) (*convey any license under its patent rights nor the rights of others. *) (*Motorola products are not designed, intended, or authorized for use as *) (*components in systems intended for surgical implant into the body, or *) (*other applications intended to support or sustain life, or for any other *) (*application in which the failure of the Motorola product could create a *) (*situation where injury or death may occur. Should Buyer purchase or use *) (*Motorola products for any such unintended or unauthorized application, *) (*Buyer, shall indemnify and hold Motorola and its officers, employees, *) (*subsidiaries, affiliates, and distributors harmless against all claims, *) (*costs, damages, and expenses, and reasonable attorney fees arising out *) (*of, directly or indirectly, any claim of personal injury or death *) (*associated with such unintended or unauthorized use, even if such claim *) (*alleges that Motorola was negligent regarding the design or manufacture *) (*of the part. *) (*Motorola and the Motorola logo are registered trademarks of Motorola Inc.*) (*Motorola is an Equal Opportunity/Affirmative Action Employer. *) (*Copyright Motorola Inc. 1993 *) (***************************************************************************) (* Parameters *) %macro CHANNEL_CONTROL_ITC 'prm0'. %macro START_LINK_CHANNEL 'prm1'. %macro LINK_CHANNEL_COUNT 'prm1'. %macro BANK_ADDR 'prm1'. %macro MAX_COUNT 'prm2'. %macro TRANS_COUNT 'prm3'. %macro FINAL_TRANS_TIME 'prm4'. %macro LAST_TRANS_TIME 'prm5'. %macro LINK_MODE_ 'hsq1'. %macro CONTINOUS_MODE 'hsq0'. %include 'linkchan.UC'. (* Include routine to link to a block of channels. *) (**********************************************************************) (* *) (* STATE : Count_up *) (* *) (* PRELOAD PARAMETER : TRANS_COUNT *) (* *) (* ENTER WHEN : a transition is detected *) (* *) (* ACTION : increment pulcnt; *) (* if not reached MAX_COUNT then update LAST_TRANS_TIME *) (* if pulcnt reached MAXCNT *) (* then *) (* 1. update FINAL_TRANS_TIME *) (* 2. assert chan cir *) (* 3. check and execute link *) (* 4. Increament BANK signal *) (* 5. if in continual mode then reset TRANS_COUNT *) (* else assert disable transitions detection. *) (**********************************************************************) %entry ram p <- @START_LINK_CHANNEL; start_address *; name = count_up; cond hsr1 = 0,hsr0 = 0,m/tsr = 1,lsr = x. Count_up : (* increment TRANS_COUNT coherently *) ram diob <- @TRANS_COUNT; au dec := p_high. (* prapare dec for link *) au diob := diob + 1; ram diob -> @TRANS_COUNT. (* read coherently PLCNT and MACXNT *) ram diob <- @TRANS_COUNT. au sr := diob; ram diob <- @MAX_COUNT. (* compare pulcnt and maxcnt *) au nil := diob - sr, ccl. if LOW_SAME = TRUE then goto Count_ended, flush. Count_not_equal_Max : (* update LAST_TRANS_TIME *) au diob := ert; ram diob -> @LAST_TRANS_TIME. End_Transition: chan neg_tdl; end. Count_ended : if @LINK_MODE_ = 0 then goto Upd_Bank_Signal. (* update FINAL_TRANS_TIME *) au diob := ert; ram diob -> @FINAL_TRANS_TIME. Link_mode : call Link_chan, flush; dec_return. Upd_Bank_Signal : (* chan set BANK indication byte - high byte *) (* MODIFY HIGH BYTE OF BANK *) au diob := p_low. ram p <- by_diob. (* READ MODIFY WRITE *) au p_high := p_high + 1; ram p -> by_diob. check_single_mode : if @CONTINOUS_MODE = 0 then goto End_ITC_phase. chan PAC := no_change; chan cir. Continual_mode : ram p <- @CHANNEL_CONTROL_ITC. (* State continues with next instructions ..*) (**********************************************************************) (* *) (* STATE : Init *) (* *) (* PRELOAD PARAMETER : CHCTL *) (* *) (* ENTER WHEN : issued host service request 01 *) (* *) (* ACTION : configure channel latches by p register *) (* reset TRANS_COUNT *) (**********************************************************************) %entry ram p <- @CHANNEL_CONTROL_ITC; start_address *; name = init_itc; cond hsr1 = 0, hsr0 = 1. Init_ITC : au diob := 0; ram diob -> @TRANS_COUNT. chan config := p, enable_mtsr. End_ITC_phase : chan neg_lsl, neg_mrl, neg_tdl; (* Clear all pending conditions *) end. (**********************************************************************) (* UNUSED ENTRIES - execute an end. *) (**********************************************************************) %entry start_address End_of_Link; name = itc_undef; cond hsr1 = 0,hsr0 = 0,m/tsr = 0,lsr =1. %entry start_address End_of_Phase; name = itc_undef; cond hsr1 = 1,hsr0 = 1. %entry start_address End_of_phase; name = itc_undef; cond hsr1 = 1,hsr0 = 0.